Growth of Semiconductor Crystals
Growth of semiconductor Crystals
Electronic grade silicon is made by purifying 95-97% polysilicon, which is prepared by heating silica and carbon in an ambient that is ideal for the reduction of former. The resulting material is converted to SiHCl3, thermally decomposed in H2 chamber at 1100 oC. Precise amount of dopant (not in the form of Phosphorous or Boron elements) but as powder of doped semiconductor may be mixed in the melt to get semiconductor crystals of desired doping. Main impurities in this poly-silicon are O2 and Carbon, which get further reduced when it is melted and re-crystallized into a single crystal by Czochralski (CZ) technique.
This technique is used to grow single crystals of semiconductors (Si, Ge, GaAs), metals (Ag, Au, Pt, Sn, Bi), bimetals like AlSb, InSb, GaSb, CsJ, and other compounds such as KBr, CaF2, BaF2, NaCl, LiN, Al-Pd-Mn etc. Large cylindrical ingots or boules of single crystal silicon are grown by using CZ method, as it is capable of delivering large diameter boules, from which Si wafers of diameter as large as 12 inch, needed for modern production lines, can be cut. Melt high-purity (impurity ~few ppm) polycrystalline silicon in a Crucible of inert material such as Quartz. Maintain it in an inert ambient (Ar) at low pressure ~10 Torr. Add requisite amount of Boron or Phosphorous, to dope the molten silicon and convert it from p-type to n-type etc. To eliminate the impurities, do it in a clean room – and use hyperpure silica for the crucible.
Make sure that the inside of the machine is equally clean and that the gas flow – inert gas being introduced as well as the SiO2 coming from the molten Si (part of crucible wall dissolves) - does not interfere with the growing crystal. The chamber containing the crucible is heated to ~1500 oC in inert ambient. Once the polysilicon is fully melted, a 10 cm long seed crystal of desired orientation mounted on a rotating shaft is slowly introduced to dip just below the surface of the molten silicon. The shaft rotates counterclockwise and the crucible rotates clockwise independently at a rate between 1 and 10 rpm. The rotating rod is pulled upwards very gradually, to allow a cylindrical boule of silicon take shape.
Electronic grade silicon is made by purifying 95-97% polysilicon, which is prepared by heating silica and carbon in an ambient that is ideal for the reduction of former. The resulting material is converted to SiHCl3, thermally decomposed in H2 chamber at 1100 oC. Precise amount of dopant (not in the form of Phosphorous or Boron elements) but as powder of doped semiconductor may be mixed in the melt to get semiconductor crystals of desired doping. Main impurities in this poly-silicon are O2 and Carbon, which get further reduced when it is melted and re-crystallized into a single crystal by Czochralski (CZ) technique.
This technique is used to grow single crystals of semiconductors (Si, Ge, GaAs), metals (Ag, Au, Pt, Sn, Bi), bimetals like AlSb, InSb, GaSb, CsJ, and other compounds such as KBr, CaF2, BaF2, NaCl, LiN, Al-Pd-Mn etc. Large cylindrical ingots or boules of single crystal silicon are grown by using CZ method, as it is capable of delivering large diameter boules, from which Si wafers of diameter as large as 12 inch, needed for modern production lines, can be cut. Melt high-purity (impurity ~few ppm) polycrystalline silicon in a Crucible of inert material such as Quartz. Maintain it in an inert ambient (Ar) at low pressure ~10 Torr. Add requisite amount of Boron or Phosphorous, to dope the molten silicon and convert it from p-type to n-type etc. To eliminate the impurities, do it in a clean room – and use hyperpure silica for the crucible.
Make sure that the inside of the machine is equally clean and that the gas flow – inert gas being introduced as well as the SiO2 coming from the molten Si (part of crucible wall dissolves) - does not interfere with the growing crystal. The chamber containing the crucible is heated to ~1500 oC in inert ambient. Once the polysilicon is fully melted, a 10 cm long seed crystal of desired orientation mounted on a rotating shaft is slowly introduced to dip just below the surface of the molten silicon. The shaft rotates counterclockwise and the crucible rotates clockwise independently at a rate between 1 and 10 rpm. The rotating rod is pulled upwards very gradually, to allow a cylindrical boule of silicon take shape.
Suppress the temperature gradients in the crucible and the resulting convection in Si melt
by using magnetic field. Insert the seed crystal, adjust the temperature to "just right", and
start withdrawing the seed crystal at a rate of about 1 mm/min. For
homogeneity, rotate the seed crystal and the crucible in opposite directions. Initially the
seed is pulled away rather quickly decreasing the diameter of the growing crystal to a few
mm. This is called "Dash process" and it ensures that the crystal is dislocation-free, even
if the seed crystal contained some dislocations.
Float Zone Method: CZ wafers are contaminated by O2 and C from the crucible or graphite heaters. This limits their resistivity to ~ 20 Ωcm, while intrinsic Si has a resistivity of 230 k Ωcm. Float zone method is used to purify the boule grown by CZ method. Extremely high purity Si wafers are made using float zone growth. In FZ method, a seed crystal is brought into contact with the top of the rod in an inert atmosphere, an RF field induces eddy currents in the rod, leading to joule heating, and so the rod melts in a tiny zone about 2 cm wide. The seed crystal touches the melt zone and is pulled away, along with a solidifying Si boule following the seed.
Slicing the wafers: This hard brittle silicon is sliced into thin wafers by diamond blades, and a very precise monitoring of the orientation, thickness, taper and bow etc. are done. The entire operation consists of several machining, chemical and polishing operations of cutting and polishing into wafers of desired thickness. Two-sided lapping removes almost 20 micron from each surface and brings the surface of the wafer to within 2 micronflatness. The work damage and contamination is removed by a 10 micron chemical (HNA plus alkaline) etch. A final chemical mechanical polishing removes 25 micron of silicon to make it optically flat. To ensure low junction leakage currents, metallic impurities are gettered (removed) from the back of the wafer by sand blasting or using high energy laser. The wafers are often sliced in <100> or <111> direction and a flat edge is cut on its circumference. By observing wafer flats we can distinguish between Si wafers of type <100> or <111> type. These wafer flats provide the orientation needed by the automatic equipment which are utilized to process semiconductor devices from these wafers.
Float Zone Method: CZ wafers are contaminated by O2 and C from the crucible or graphite heaters. This limits their resistivity to ~ 20 Ωcm, while intrinsic Si has a resistivity of 230 k Ωcm. Float zone method is used to purify the boule grown by CZ method. Extremely high purity Si wafers are made using float zone growth. In FZ method, a seed crystal is brought into contact with the top of the rod in an inert atmosphere, an RF field induces eddy currents in the rod, leading to joule heating, and so the rod melts in a tiny zone about 2 cm wide. The seed crystal touches the melt zone and is pulled away, along with a solidifying Si boule following the seed.
Slicing the wafers: This hard brittle silicon is sliced into thin wafers by diamond blades, and a very precise monitoring of the orientation, thickness, taper and bow etc. are done. The entire operation consists of several machining, chemical and polishing operations of cutting and polishing into wafers of desired thickness. Two-sided lapping removes almost 20 micron from each surface and brings the surface of the wafer to within 2 micronflatness. The work damage and contamination is removed by a 10 micron chemical (HNA plus alkaline) etch. A final chemical mechanical polishing removes 25 micron of silicon to make it optically flat. To ensure low junction leakage currents, metallic impurities are gettered (removed) from the back of the wafer by sand blasting or using high energy laser. The wafers are often sliced in <100> or <111> direction and a flat edge is cut on its circumference. By observing wafer flats we can distinguish between Si wafers of type <100> or <111> type. These wafer flats provide the orientation needed by the automatic equipment which are utilized to process semiconductor devices from these wafers.
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